Sparxity Closes Series A, Lifting Total Funding to $90 Million

Sparxity, the Dresden-based computing company formerly known as SpiNNcloud, has closed a Series A round that brings cumulative funding secured by its team to $90 million, money the company will spend on specialized chips for fine-grained dynamic sparsity in AI workloads.

ICM HPQC Fund led the round. Lockheed Martin Ventures, GlobalFoundries, GS Futures, Cloudberry Ventures, TGFS and the EIC Fund also invested. Angel investors include Richard Socher and Nancy Xu, alongside continued backing from Atlantic and Silicon Catalyst. Sparxity did not disclose the Series A amount separately from the cumulative figure.

The company's next-generation hardware targets up to 44 times faster inference in ultra-sparse models. That number matters because it addresses the central cost problem in AI infrastructure: dense neural networks apply computation across a large set of parameters whether or not every parameter contributes to the task at hand. Sparse architectures activate only the relevant parts of a model, which can increase a model's effective capacity without making every parameter participate in every calculation.

Why do sparse models need different hardware?

The economics of sparsity collapse at fine granularity. When the activated parts of a model change with every input, hardware must route work to the right resources and move the relevant data efficiently. Skipping arithmetic helps only if the cost of finding, scheduling and communicating the remaining work does not erase the gain.

Sparxity's technology overview frames its architecture around exactly that problem, pointing to finer-grained selection across experts, memory and attention. The company develops chips and software together, so model builders can use sparse structures that run poorly on hardware designed primarily for dense computation.

"The next era of AI will be defined not just by how much computing power we can deliver, but by how intelligently and efficiently we use it," said Hector Gonzalez, co-founder and CEO of Sparxity. Gonzalez said the financing will accelerate dedicated silicon for ultra-sparse workloads within heterogeneous data centers.

The stakes are straightforward. AI inference costs now dominate infrastructure budgets across the industry, and an architecture that executes only the computation a given input requires would cut both latency and energy use. Sparxity's bet is that this requires new silicon, not just new model structures.

What is the research behind the strategy?

One research direction behind the company's approach is PEER, or parameter efficient expert retrieval. In the paper "Mixture of a Million Experts," researcher Xu Owen He described a layer that retrieves a small selection from a pool of more than one million tiny experts. Experiments on language-modeling tasks examined how that approach changes the relationship between model performance and computational cost.

The principle expands what a model can draw on without processing the entire pool for each input. Translating that model-level efficiency into lower latency and energy use requires a system that can handle the resulting fine-grained work — precisely the workload Sparxity's chips are intended to execute.

He, a former Google DeepMind researcher and now a Sparxity strategic advisor, said co-designing models, distillation pipelines and hardware around sparsity can unlock further computing efficiency. That connection is what the new funding is meant to develop: models that choose more selectively, paired with hardware able to execute those choices.

What does Sparxity already ship?

The company is not starting from zero. Sparxity reports:

• three chip tapeouts completed;
• more than 70,000 chips produced;
• 12 racks deployed;
• more than 30 customers worldwide;
• revenue that quadrupled between 2024 and 2025, with continued momentum in 2026.

Its current systems address both high-performance computing and AI. On selected workloads running on those existing systems, Sparxity reports 10-times-faster sparse solvers, 18-times-lower energy use for event-based machine learning, and 20-times-shorter optimization runtimes.

The distinction between shipped results and targets is central to the financing story. The measured figures concern particular applications on current systems; the up-to-44-times inference number is a target for next-generation technology in ultra-sparse models. Sparxity already manufactures and deploys systems, while the Series A supports a further step into hardware designed specifically for dynamic sparsity in AI inference.

How does Jülich use the technology?

The Jülich Supercomputing Centre independently describes a two-rack SpiNNaker2 system from Sparxity called JUBIS, installed in April 2026. The system comprises 4,320 chips and 656,640 ARM cores with neuromorphic accelerators.

JUBIS supports Jülich's Event-based Supercomputer for AI and Beyond project, which explores real-time AI, neuroscience simulations and other workloads such as quantum-computer emulation. The project also includes benchmarking, application prototyping and software development to make the system useful within a broader high-performance computing environment.

That deployment illustrates why a computing architecture needs more than a chip specification. Researchers need tools, interfaces and a way to integrate the system into existing work. Sparxity's full-stack approach spans that path from custom silicon to multi-rack installations.

What is the route into commercial data centers?

Sparxity is also working with T-Systems on a path into commercial data centers. Deutsche Telekom's November 3 announcement describes a signed letter of intent to combine Sparxity's technology with T-Systems' infrastructure and operating expertise.

The planned sequence starts with current hardware to develop technical integration approaches, followed by deployment of next-generation chips planned for 2028. The partners expect to agree on further details over the coming months.

For Sparxity, the new capital supports a move from proving sparse computing in specialized systems toward a larger role in mainstream AI infrastructure. The company's thesis is that future gains will come from doing less unnecessary work — and from designing the hardware, software and models together so those savings translate into useful performance. With T-Systems integration planned and next-generation silicon targeted for 2028, the next three years will test whether sparsity can move from research papers into the data center mainstream.